Counter Circuit using Schmitt Trigger

In electronics, a Schmitt trigger is a comparator circuit with hysteresis, implemented by applying positive feedback to the noninverting input of a comparator or differential amplifier. It is an active circuit which converts an analog input signal to a digital output signal. The circuit is named a "trigger" because the output retains its value until the input changes sufficiently to trigger a change. In the non-inverting configuration, when the input is higher than a certain chosen threshold, the output is high. When the input is below a different (lower) chosen threshold, the output is low, and when the input is between the two levels, the output retains its value. This dual threshold action is called hysteresis and implies that the Schmitt trigger possesses memory and can act as a bistable circuit (latch or flip-flop). There is a close relation between the two kinds of circuits: a Schmitt trigger can be converted into a latch and a latch can be converted into a Schmitt trigger.

Schmitt trigger devices are typically used in signal conditioning applications to remove noise from signals used in digital circuits, particularly mechanical switch bounce. They are also used in closed loop negative feedback configurations to implement relaxation oscillators, used in function generators and switching power supplies.

The JK Flip Flop Using D-Flip flop

D Flip Flop is primarily meant to provide delay as the output of this Flip Flop is same as the input. D Flip Flop can easily be made by using a SR Flip Flop or JK Flip Flop. But sometimes designers may be required to design other Flip Flops by using D Flip Flop. Here we discuss how to convert a D Flip Flop into JK and SR Flip Flops.

The first thing that needs to be done for converting one Flip Flop into another is to draw the truth table for both the Flip Flops. The next step is to create the equivalent K-Maps for the required outputs.

The Ripple Counter (Mod Counter)

A ripple counter is an asynchronous counter where only the first flip-flop is clocked by an external clock. All subsequent flip-flops are clocked by the output of the preceding flip-flop. Asynchronous counters are also called ripple-counters because of the way the clock pulse ripples it way through the flip-flops.

The MOD of the ripple counter or asynchronous counter is 2n if n flip-flops are used. For a 4-bit counter, the range of the count is 0000 to 1111 (24-1). A counter may count up or count down or count up and down depending on the input control. The count sequence usually repeats itself. When counting up, the count sequence goes from 0000, 0001, 0010, ... 1110 , 1111 , 0000, 0001, ... etc. When counting down the count sequence goes in the opposite manner: 1111, 1110, ... 0010, 0001, 0000, 1111, 1110, ... etc.

The complement of the count sequence counts in reverse direction. If the uncomplemented output counts up, the complemented output counts down. If the uncomplemented output counts down, the complemented output counts up.

There are many ways to implement the ripple counter depending on the characteristics of the flip flops used and the requirements of the count sequence.

• Clock Trigger: Positive edged or Negative edged
• JK or D flip-flops
• Count Direction: Up, Down, or Up/Down

Asynchronous counters are slower than synchronous counters because of the delay in the transmission of the pulses from flip-flop to flip-flop. With a synchronous circuit, all the bits in the count change synchronously with the assertion of the clock. Examples of synchronous counters are the Ring and Johnson counter.

It can be implemented using D-type flip-flops or JK-type flip-flops.

The circuit below uses 2 D flip-flops to implement a divide-by-4 ripple counter (2n = 22 = 4). It counts down

Johnson Counter

The Sequential Ring Counter

In the previous Shift Register tutorial we saw that if we apply a serial data signal to the input of a Serial-in to Serial-out Shift Register, the same sequence of data will exit from the last flip flip in the register chain after a preset number of clock cycles thereby acting as a sort of time delay circuit to the original input data signal.

But what if we were to connect the output of this Shift Register back to its input so that the output from the last flip-flop, QD becomes the input of the first flip-flop, DA. We would then have a closed loop circuit that “recirculates” the same bit of DATA around a continuous loop for every state of its sequence, and this is the principal operation of a Ring Counter.

Then by looping the output back to the input, (feedback) we can convert a standard shift register circuit into a ring counter. Consider the circuit below.

4-bit Ring Counter

The synchronous Ring Counter example above, is preset so that exactly one data bit in the register is set to logic “1” with all the other bits reset to “0”. To achieve this, a “CLEAR” signal is firstly applied to all the flip-flops together in order to “RESET” their outputs to a logic “0” level and then a “PRESET” pulse is applied to the input of the first flip-flop ( FFA ) before the clock pulses are applied. This then places a single logic “1” value into the circuit of the ring counter.

So on each successive clock pulse, the counter circulates the same data bit between the four flip-flops over and over again around the “ring” every fourth clock cycle. But in order to cycle the data correctly around the counter we must first “load” the counter with a suitable data pattern as all logic “0’s” or all logic “1’s” outputted at each clock cycle would make the ring counter invalid.

This type of data movement is called “rotation”, and like the previous shift register, the effect of the movement of the data bit from left to right through a ring counter can be presented graphically as follows along with its timing diagram:

Rotational Movement of a Ring Counter

Since the ring counter example shown above has four distinct states, it is also known as a “modulo-4″ or “mod-4″ counter with each flip-flop output having a frequency value equal to one-fourth or a quarter (1/4) that of the main clock frequency.

The “MODULO” or “MODULUS” of a counter is the number of states the counter counts or sequences through before repeating itself and a ring counter can be made to output any modulo number. A “mod-n” ring counter will require “n” number of flip-flops connected together to circulate a single data bit providing “n” different output states.

For example, a mod-8 ring counter requires eight flip-flops and a mod-16 ring counter would require sixteen flip-flops. However, as in our example above, only four of the possible sixteen states are used, making ring counters very inefficient in terms of their output state usage.

Johnson Ring Counter

The Johnson Ring Counter or “Twisted Ring Counters”, is another shift register with feedback exactly the same as the standard Ring Counter above, except that this time the inverted output Q of the last flip-flop is now connected back to the input D of the first flip-flop as shown below.

The main advantage of this type of ring counter is that it only needs half the number of flip-flops compared to the standard ring counter then its modulo number is halved. So a “n-stage” Johnson counter will circulate a single data bit giving sequence of 2n different states and can therefore be considered as a “mod-2n counter”.

4-bit Johnson Ring Counter

This inversion of Q before it is fed back to input D causes the counter to “count” in a different way. Instead of counting through a fixed set of patterns like the normal ring counter such as for a 4-bit counter, “0001”(1), “0010”(2), “0100”(4), “1000”(8) and repeat, the Johnson counter counts up and then down as the initial logic “1” passes through it to the right replacing the preceding logic “0”.

A 4-bit Johnson ring counter passes blocks of four logic “0” and then four logic “1” thereby producing an 8-bit pattern. As the inverted output Q is connected to the input D this 8-bit pattern continually repeats. For example, “1000”, “1100”, “1110”, “1111”, “0111”, “0011”, “0001”, “0000” and this is demonstrated in the following table below.

Truth Table for a 4-bit Johnson Ring Counter

Clock Pulse No	FFA	FFB	FFC	FFD
0	0	0	0	0
1	1	0	0	0
2	1	1	0	0
3	1	1	1	0
4	1	1	1	1
5	0	1	1	1
6	0	0	1	1
7	0	0	0	1

As well as counting or rotating data around a continuous loop, ring counters can also be used to detect or recognise various patterns or number values within a set of data. By connecting simple logic gates such as the AND or the OR gates to the outputs of the flip-flops the circuit can be made to detect a set number or value.

Digital Logic Design

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Standard 2, 3 or 4-stage Johnson Ring Counters can also be used to divide the frequency of the clock signal by varying their feedback connections and divide-by-3 or divide-by-5 outputs are also available.

For example, a 3-stage Johnson Ring Counter could be used as a 3-phase, 120 degree phase shift square wave generator by connecting to the data outputs at A, B and NOT-B.

The standard 5-stage Johnson counter such as the commonly available CD4017 is generally used as a synchronous decade counter/divider circuit.

Other combinations such as the smaller 2-stage circuit which is also called a “Quadrature” (sine/cosine) Oscillator or Generator can be used to produce four individual outputs that are each 90 degrees “out-of-phase” with respect to each other to produce a 4-phase timing signal as shown below.

2-bit Quadrature Generator

Output	A	B	C	D
QA+QB	1	0	0	0
QA+QB	0	1	0	0
QA+QB	0	0	1	0
QA+QB	0	0	0	1
2-bit Quadrature Oscillator, Count Sequence

As the four outputs, A to D are phase shifted by 90 degrees with regards to each other, they can be used with additional circuitry, to drive a 2-phase full-step stepper motor for position control or the ability to rotate a motor to a particular location as shown below.

Stepper Motor Control

2-phase (unipolar) Full-Step Stepper Motor Circuit

The speed of rotation of the Stepper Motor will depend mainly upon the clock frequency and additional circuitry would be require to drive the “power” requirements of the motor. As this section is only intended to give the reader a basic understanding of Johnson Ring Counters and its applications, other good websites explain in more detail the types and drive requirements of stepper motors.

Johnson Ring Counters are available in standard TTL or CMOS IC form, such as the CD4017 5-Stage, decade Johnson ring counter with 10 active HIGH decoded outputs or the CD4022 4-stage, divide-by-8 Johnson counter with 8 active HIGH decoded outputs.

FREQUENCY DIVISION AND COUNTING

Each FF has J and K inputs at the 1 level,so that it will
change states (toggle) whenever the signal on CLK input goes from HIGH to LOW.
The Clock pulses are applied only to the CLK input of FF Q0.Output Q0 is connected
to the CLK input of FF Q1, and output Q1 is connected to the CLK input of FF Q2.
The Following important points should be noted :

1. Flip-flop Q0 toggles on the negative-going transition of each input clock pulse.
Thus,the Q0 output waveform has a frequency that is exactly one-half of the clock pulse frequency.

2. Flip-flop Q1 toggles each time the Q0 output goes from HIGH to LOW. The Q1 waveform has a frequency equal
to exactly one-half the frequency of the Q0 output and therefore one-fourt of the clock frequency.

3. Flip-flop Q2 toggles each time the Q1 output goes from HIGH to LOW. Thus, the Q2 waveform has one-half the frequency
of Q1 and therefore one-eighth of the clock frequency.

4.Each FF output is a square wave ( 50 Percent duty cycle).

As described above each FF divides the frequency of its inpt by 2. THus, if we were to add a fourth
FF to the chain, it would have a frequency equal to one-sixteenth


of the clock frequency, and so on. Using the appropraite number of FF, this circuit
could divide a frequency by any power of 2. Specially, Using N flip-flops would produce an output frequency
from the last FF which is equal to 1/2 N of the input frequency.

This Application of flip-flops is reffered to as frequency division.For example,your wristwatch is no doubt
a "quartz" watch. the term quart watch means that a quartz crystal is used to generate a very stable oscillator frequency.
The natural resonant frequency of the quartz crystal in your watch is likely 1 MHz or more. In order to advance
the "seconds" display once every second, the oscillator frequency is divided by a value that will produce a very
stable and accurate 1 Hz output frequency.

COUNTING OPERATION
In addition to functioning as a frequency divider also operates a binary counter.This can be demonstrated by examining
the squence of states of the FFs after the occurrence of each clock pulse.

Binary Counters

Then we can see that a counter is nothing more than a specialised register or pattern generator that produces a specified output pattern or sequence of binary values (or states) upon the application of an input pulse signal called the “Clock”.
The clock is actually used for data transfer in these applications. Typically, counters are logic circuits that can increment or decrement a count by one but when used as asynchronous divide-by-n counters they are able to divide these input pulses producing a clock division signal.
Counters are formed by connecting flip-flops together and any number of flip-flops can be connected or “cascaded” together to form a “divide-by-n” binary counter where “n” is the number of counter stages used and which is called the Modulus. The modulus or simply “MOD” of a counter is the number of output states the counter goes through before returning itself back to zero, ie, one complete cycle.
Then a counter with three flip-flops like the circuit above will count from 0 to 7 ie, 2ⁿ-1. It has eight different output states representing the decimal numbers 0 to 7 and is called a Modulo-8 or MOD-8 counter. A counter with four flip-flops will count from 0 to 15 and is therefore called a Modulo-16 counter and so on.

An example of this is given as.

•   3-bit Binary Counter = 2³ = 8 (modulo-8 or MOD-8)
•   4-bit Binary Counter = 2⁴ = 16 (modulo-16 or MOD-16)
•   8-bit Binary Counter = 2⁸ = 256 (modulo-256 or MOD-256)
• and so on..

The Modulo number can be increased by adding more flip-flops to the counter and cascading is a method of achieving higher modulus counters. Then the modulo or MOD number can simply be written as: MOD number = 2ⁿ

4-bit Modulo-16 Counter

 

Multi-bit asynchronous counters connected in this manner are also called “Ripple Counters” or ripple dividers because the change of state at each stage appears to “ripple” itself through the counter from the LSB output to its MSB output connection. Ripple counters are available in standard IC form, from the 74LS393 Dual 4-bit counter to the 74HC4060, which is a 14-bit ripple counter with its own built in clock oscillator and produce excellent frequency division of the fundamental frequency.